B&B Electronics 4 Channel Input Buffer Board SDAIBB Manuale Utente Scaricare il pdf (Pagina 12)

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SIS3316 16 Channel VME Digitizer Family

SIS3316-250-14 250 MS/s 14-bit

SIS3316-125-16 125 MS/s 16-bit

SIS3316 Block Diagram

Functionality

• 16 channels

• 14/16-bit resolution

• 250/125 MSample/s per channel

• > 125/62.5 MHz analog bandwidth

• 32 MSample/channel memory

• programmable offset DACs

• two programmable gain settings

• 50 Ω /high impedance programmable

• internal/external clock

• random clock mode for slow acquisi-

tion

• ﬁ rmware discriminator (16 individual

thresholds)

• trigger input and output

• trigger bus

• ﬂ exible acquisition and readout modes

• readout in parallel to acquisition

• A32/D32/BLT32/MBLT64/2eSST

• generic and application speciﬁ c ﬁ rmware

designs

• LEMO 00 connectors (FBM on request)

• SFP socket for high speed link readout

• In ﬁ eld JTAG and VME ﬁ rmware upgrade

With the SIS3316 board family we are doubling the channel density to 16 synchro-

nously sampling digitizer channels per single width VME card. Low power consump-

on dual ADC chips are used in combination with Xilinx Spartan 6 FPGAs. In addition

to a performant VME slave interface a SFP socket allows for high speed point to point

readout implementations.

SIS3316

SIS3316 Firmware Example: Quad Channel PSD

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B&B Electronics 4 Channel Input Buffer Board SDAIBB Manuale Utente Pagina 12